CPU
Format: CPU [CACHE] [NOCACHE] [BURST] [NOBURST] [DATACACHE]
[DATABURST] [NODATACACHE] [NODATABURST] [INSTCACHE]
[INSTBURST] [NOINSTCACHE] [NOINSTBURST) [FASTROM]
[NOFASTROM] [NOMMUTEST] [CHECK 68010|68020|68030|68040|
68881|68882|68851|MMU|FPU] [TRAP] [NOTRAP] [COPYBACK]
[NOCOPYBACK] [EXTERNALCACHE] [NOEXTERNALCACHE]
Template: CACHE/S, BURST/S, NOCACHE/S, NOBURST/S, DATACACHE/S,
DATABURST/S, NODATACACHE/S, NODATABURST/S, INSTCACHE/S,
INSTBURST/S, NOINSTCACHE/S, NOINSTBURST/S, COPYBACWS,
NOCOPYBACK/S, EXTERNALCACHE/S, NOEXTERNALCACHE/S, FASTROM/S,
NOFASTROM,S, TRAP/S, NOTRAP/S, NOMMUTEST/S, CHECK/K
Purpose: To set or clear the CPU caches, check for a particular
processor, load the ROM image into fast, 32-bit memory, or
set an illegal memory access handler which will output
information over the serial port at 9600 baud if a task
accesses page zero (lower 256 bytes) or memory above 16M on
a 68000 Amiga.
Path: C:CPU
Specification:
CPU allows you to adjust various options of the microprocessor installed in
your Amiga. CPU will also show the processor and options that are currently
enabled.
Many options only work with certain members of the 680X0 processor family.
The 68020 has a special type of memory known as instruction cache. When
instruction cache is used, instructions are executed more quickly. The 68030
has two types of cache memory: instruction and data. The CPU options,
outlined below, specify the types of memory to be used. If mutually
exclusive options are specified, the safest option is used.
Availability of the options listed below depends on availability of required
hardware.
CACHE
Turns on all caches.
NOCACHE
Turns off all caches.
BURST
Turns on burst mode for both data and instructions.
NOBURST
Turns off burst mode for data and instructions.
DATACACHE
Turns on data cache.
NODATACACHE
Turns off data cache.
DATABURST
Turns on burst mode for data.
NODATABURST
Turns off burst mode for data.
INSTCACHE
Turns on instruction cache.
INSTBURST
Turns on burst mode for instruction.
NOINSTCACHE
Turns off instruction cache.
NOINSTBURST
Turns off burst mode for instructions.
FASTROM
If supported by the MMU, copies data from ROM into 32-bit
RAM, making access to this data significantly faster. CPU
then writeprotects the RAM area so that the data cannot be
changed.
NOFASTROM
Turns off FASTROM.
NOMMUTEST
Allows the MMU settings to be changed without checking to
see if MMU is currently in use.
TRAP
Developer-specific.
NOTRAP
Developer-specific.
COPYBACK
Turns on cache copyback.
NOCOPYBACK
Turns off cache copyback.
EXTERNALCACHE
Turns on external cache.
NOEXTERNALCACHE
Turns off external cache.
The CHECK option, when given with a keyword (68010, 68020, 68030, 68040,
68881, 68882, or 68851, MMU, FPU) checks for the presence of the keyword.
Examples:
1> CPU
System: 68030 68881 (INST: Cache Burst) (DATA: Cache NoBurst)
1> CPU NoDataCache FastROM
System: 68030 68881 FastROM (INST: Cache Burst) DATA: NoCache NoBurst)
1> CPU NoBurst DataCache NoInstCache
System: 68030 68881 (INST: NoCache NoBurst) (DATA: Cache NoBurst)
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